1. Field of the Invention
The present invention relates generally to power amplifier devices, and more particularly to power amplifier circuits for use in small size electronic equipment such as a radio transmitter in digital radio telephone devices.
2. Description of the Related Art
In recent years, the portable or hand-held radio telephones are becoming more widely used in public telephone communication systems. Such telephones include frequency-modulation radiophones with the increasing needs for high performance and reliability of such hand-held radiophones, development of a small-size power amplifier has been demanded strongly.
Typically, presently available power amplifiers for use in the hand-held FM radiophone transmitters employ high-efficiency C-class power amplifier circuits due to the importance in operation efficiency of them. Some FM radiophone transmitters employ F-class power amplifier circuits, which are inherently excellent in the operation efficiency, in order to achieve further "down-sizing" of radiophones and further extension in talking time period.
The trend of technology may push radiophones to employ the digital modulation scheme, rather than the conventional analog frequency-modulation scheme. Highly advanced digital radiophone transmitters require the employment of specific power amplifier circuits being excellent in linearity characteristic due to the fact that these radiophones are designed to deal with a quadrature phase shift keying (QPSK) modulation signal, which is one of digitally modulated electrical audio signals. In other words, the digital radiophones are strongly demanded to attain an improved linearity in addition to the achievement of higher operation efficiency as has been conventionally required in the analog FM radiophones. There is a trade-off between the improvement of efficiency and the enhancement of linearity: To improve the efficiency, the power amplifiers by themselves are so designed as to operate in the saturation region; this may force the amplifiers to operate in a non-linear manner, with the result in the amplifiers being degraded in linearity.
To overcome the conflicting problems, a linearity compensator circuit for power amplifiers has been proposed. Such circuit is called the "linearizer." Conventionally, different approaches to the linearity-compensation circuit design have been proposed and studied by various groups. One of such approaches is what is called the "drain-control" linearization technique, as will be described below.
A "drain-control" linearizer is disclosed, for example, in Published Unexamined Japanese Patent Application (PUJPA) 3-104422 (FIG. 4). The linearizer may alternatively be called the "drain-controlled" linearizer in some cases. A power amplifier circuit is provided with a power supply control circuit connected to a converter providing the analog-to-digital conversion for an incoming QPSK signal. The digital-to-analog converter has an input connected to a semiconductor read-only memory (ROM) device, which stores therein digital values predetermined in accordance with the input/output characteristic of the power amplifier. The ROM has a first input connected to an inphase (I) component of the incoming QPSK signal, and a second input coupled to a quadrature (Q) component of the QPSK signal forming the vector QPSK waveform. In response to presently supplied "I" component and "Q" component, a digital value is read out of the ROM, which value suitably corresponds to the amplitude of the envelope of an input signal. The digital value thus read is then converted by the digital-to-analog converter into a corresponding analog signal. The analog signal is supplied to the control circuit as a control signal. The control circuit controls the power supply voltage of the power amplifier (that is, the drain voltage of a field effect transistor therein) so that the input-to-output characteristic of the amplifier is linearized to provide an enhanced linearity.
With such a prior-art power amplifier device, in principle, the enhancement of linearity of power amplifier does not come without accompanying penalties such as a complication of circuit configuration and a decrease in the signal-to-noise ratio. The presence of intervening digital-to-analog converter may increase necessary circuit components in number, so that the circuit is complicated as a whole. This is the contrary to the down-sizing requirement for radiophones. In addition, the digital-to-analog converter is a "power-eater" that consumes much power, causing the radiophone to increase in the power consumption as a whole. This is a bar to the achievement of an increased talking time length using the radiophone.
There is a more serious problem: The presence of digital signals behaves badly to accelerate the occurrence of noises within the circuit, causing the output audio signals sent forth or transmitted externally to decrease in quality. The noise problem will become much serious in particular in the case of broad-band power amplifiers of higher data transmission ratio. The noise problem may be solved to some extent by arranging the device so that an input signal amplitude detection section serving as a noise generator is located at an increased distance far from the power supply control section; however, in such a case, it will no longer be expected to accomplish successful control that is essential to the operation stability of the power amplifier, such as the temperature compensation.
Moreover, with the prior art, it should be required that information on the non-linear input-to-output characteristic of the power amplifier is prestored in the ROM. Access to the ROM contents is done depending upon an input QPSK signal externally supplied thereto. This necessitates that the power amplifier device is so designed as to form a pair with a modulator; it is not permissible that these circuits are freely located at different positions. Such layout limitation makes it impossible for the power amplifier device to operate independently in a self-supporting or "self-reliance" fashion, which limits extremely the flexibility of the circuit design.
Another drain-control linearizer is disclosed, for example, in PUJPA 63-164631 (FIG. 1). This prior-art device may be similar to the above power amplifier device with the ROM being arranged to have an input connected to the output of an analog-to-digital converter, which is interconnected at its input to a directional coupler by way of a radiowave detector. The coupler subdivides an incoming signal into first and second signal components, one of which is supplied to the input of a power amplifier circuitry, and the other of which is given to an RF-signal detector.
With the prior art, adding an increased number of extra circuit components serves to enlarge the demerits as described previously. In addition to this, the achievement of down-sizing becomes more difficult. This is due to the fact that the employment of the directional coupler does never allow that an input signal detection section including the coupler and a power amplifier section are packed onto the same substrate. This makes it further difficult to attain suitable temperature compensation.